1. Field of the Invention
The present invention relates to a semiconductor device, a unique ID of the semiconductor device and a method for verifying the unique ID and more particularly, to a technique for shortening a manufacturing time in a SOC (System on Chip) having fuse cutting type of data recording means and a unique ID recorded in a fuse.
2. Description of the Background Art
Conventionally, there is a method for recording a unique identification number, that is, a unique ID uniquely allocated to each SOC (System on Chip) in order to implement a secure function in the SOC (for example, Japanese Patent Application Laid-Open No. 2003-101527).
Although this unique ID can be recorded in a flash ROM (Read Only Memory) and a HDD (Hard Disk Drive) that constitute a system using the above SOC, it is difficult to record it in a memory mounted on a SOC manufactured by a normal CMOS (Complementary Metal Oxide Semiconductor) process. Therefore, the manufacturing method of a general SOC comprises a method for forming a unique ID by cutting a fuse by laser trimming (referred to as the LT occasionally) and the like at a wafer test step before an assembly step.
Since this unique ID needs uniqueness to implement a secure function, chip information such as the lot number of the manufactured SOC, the wafer number of the cut SOC, the position (chip position) of the manufactured SOC on the wafer or a manufacturing date is used as the unique ID in general.
Thus, this chip information is related to “n” bits A0 to An−1(n is a natural number) and in a fuse box having “n” fuses, each fuse is cut according to the values of the bits A0 to An−1(for example, it is cut in the case of “1” and not cut in the case of “0”).
Japanese Patent Application Laid-Open No. 2003-101527 discloses a technique for encrypting or decoding data using ID information recorded in a fuse by laser trimming and the like.
As described above, according to the unique ID, since the chip information is related to the fuse as the bit value, as the number of chips formed on one wafer is increased, the number of fuses is increased. Therefore, as it is miniaturized or its diameter is enlarged, it takes time to perform the LT. For example, in a case where 4000 chips can be formed on one wafer, when it is assumed that 128 fuses (128 bits) are provided in one chip and 64 fuses of its half is cut, the LT is needed 256000=64×4000 times in the wafer. Thus, the problem is that the manufacturing time of the semiconductor device such as the SOC becomes long.
In addition, although the chip information of the target SOC is used in order to implement a secure function in the unique ID in general, since the chip information has regularity and lacks in random nature, when the fuse is broken unexpectedly or worn out, there generated a plurality of same unique IDs accidentally.
Namely, since the chip number designating the chip position is serially set in the same wafer having the same lot number, when an error is generated in the chip number, at least two sets of chips have the same unique ID.
In addition, since the wafer number is serially set in the chip having the different wafer number but having the same lot number and positioned at the same position on the wafer, when an error is generated in the wafer number, at least two sets of chips having the same unique ID are generated.
Furthermore, since the lot number is serially set in the chip having the different lot number but positioned on the same place on the wafer, when the error is generated in the lot number, at least two sets of chips having the same unique ID are generated.
In addition, when the unique ID comprises the chip information only, in a case where the unique ID is decoded in one chip, the unique ID in another chip could be easily guessed based on that information. In this case, even when the unique ID is used for implementing the secure function, the secure function cannot be implemented.
Furthermore, since yield information and the like can be guessed from the chip information, the problem is that the information that a SOC manufacturer does not want an end user to know is disclosed.
However, there is the following problem in a case where the unique ID is constituted with data other than the chip information.
That is, in a case where the unique ID comprises random data with respect to each SOC, for example, when the unique ID is verified, it is necessary to prepare the same data as that of the unique ID in a tester as expectation value data to be compared and it is necessary to prepare the expectation value data corresponding to the number of the SOCs in the tester, which takes a lot of trouble.
In addition, since the expectation value is tested in the same function pattern in the test of the LSI in general, when the kinds of the expectation value is increased, it is necessary to prepare the test patterns so as to correspond the number of kinds, which takes a lot of trouble.
In addition, although the test pattern can be incremented every LSI based on one kind of test pattern, this is not practical because the setting of an initial value becomes complicated and it takes a lot of trouble at the time of retesting.